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  isolated diode array with hirel mq, mx, mv, and msp screening options scottsd a l e division 1N6101 w w w . mi c r o s e m i . c o m 1 n 6 1 0 1 descripti on appeara n c e t hese lo w c a p a citanc e di ode arra y s are mu ltip le, d i screte, isolat ed ju nctio n s fabricate d b y a pla nar pr ocess an d mo unted i n a 1 6 -pin packag e for use as ste e rin g dio d e s protecting up t o eight i/o port s from esd, ef t , or surge by directing them either t o the positiv e si de of the po w e r s u p p l y l i n e or to gr oun d (se e fi gur e 1). a n e x tern al t vs dio d e ma y b e a d d e d bet w e e n the positiv e su pp l y lin e an d gr ou nd to pr event overvo ltage o n the su pp l y ra il. t h e y m a y als o b e used i n f a st s w itch ing c o re-driv e r ap pli c ations. t h is inclu des com puters an d p e rip hera l eq ui pm ent such as magn etic cores, thin-fil m memories, pl at ed- w i r e memo ries, etc., as w e ll as d e co di ng or enc odi n g app licati ons. t hese arra ys offer ma n y adva n tag e s of inte grate d ci rcuits suc h a s hi gh-d ens it y packa gin g an d improved re lia bilit y. t h is is a result of fe w e r pick and p l a c e oper ations, smaller fo otpri n t, smaller w e i ght, and elim in at ion of vario u s discrete pack ages th at ma y not be as us er friend l y in pc b oard mo unti ng. 16-pin ce ram i c dip import a n t : f o r the most cur r e n t data, consult mi c r os e m i ? s w e bsite: http:// www .microsemi.com features a p p l i c at ions / be ne fi ts ? hermetic cer a mic package ? isolated d i o d e s to eliminate cross-t a lk voltages ? high br eakd o w n voltag e v br > 75 v at 5 a ? lo w l eak age i r < 100na at 40 v ? lo w c apac itan ce c < 4.0 pf ? s w itc h i ng spe eds less tha n 1 0 ns ? options for screen ing i n accor danc e w i th mil - prf - 195 00/4 74 for jan, jant x, jant xv, and jans are avail a b l e b y a d d in g mq, mx, mv, or msp prefixes respectiv e l y to part numb e rs. f o r exampl e, desig nate mx1 n 6 101 for a jant x scree n. ? high f r e que nc y dat a lin e s ? rs-23 2 & rs-422 interfac e net w orks ? ethernet: 10 b a se t ? computer i/o ports ? lan ? s w itc h i ng cor e drivers ? iec 6100 0-4 c o mpati b le (se e circuit in figur e 1) 610 00-4- 2 es d: air 15 kv, contact 8 kw 610 00-4- 4 (ef t ): 40 a ? 5/5 0 ns 610 00-4- 5 (sur ge): 12 a 8/20 s max i mu m rat ing s mechan ic al an d pa ckagin g ? revers e break do w n v o lta ge of 75 vdc (not e 1 & 2) ? conti nuo us f o r w a r d curr ent of 300 ma dc (note 1 & 3) ? peak surg e cu rrent (tp= 1/120 s) of 500 ma dc (note 1) ? 400 mw po w e r dissipati on p e r junctio n @ 25 o c ? 600 mw po w e r dissipati on p e r packag e @ 25 o c (note 4) ? operatin g junc tion t e mper atu r e rang e ?6 5 to + 150 o c ? storage t e mperature ra ng e of ?65 to + 200 o c ? 16-pin cer a mi c dip ? w e ight 2.09 grams (appr o x im ate) ? marking: l ogo, part number, d a te code ? pin #1 to the l e ft of the ind ent on top of packa ge ? carrier t ubes; 25 pcs (stand a r d) no t e 1: each diode note 2: pulsed: p w = 100 ms max; dut y c y c l e < 20 % note 3: derate at 2.4 ma / o c above +25 o c note 4: derate at 4.8 m w / o c above +25 o c elec tric al ch ara cteri s tic s ( p er diod e) @ 25 o c u n less otherwise specified ma x i m u m forw a r d vo lt a g e v f1 i f = 100 m a (no t e 1) ma x i m u m reverse curren t i r1 v r = 40 v ma x i m u m reverse curren t i r2 v r = 20 v ma x i m u m c a p a cit a nc e (pin t o pin ) c t v r = 0 v f = 1 mhz ma x i m u m forw a r d reco very time t fr i f = 100 m a ma x i m u m reverse reco very tim e trr i f = i r = 10 m a d c i rr = 1 m a dc r l = 100 o h ms ma x i m u m forw a r d vo lt a g e m a t ch v f5 i f = 10 m a pa r t number v a n a p f n s n s m v 1n6 1 0 1 1 0 . 1 2 5 4 . 0 1 5 1 0 5 note 1: pulsed : p w = 300 s +/- 50 s, dut y c y cl e < 2%, 90 s aft e r leading edge. m i cro semi scottsdale division 8700 e. thom as rd. po bo x 139 0, scottsdale, az 85252 usa, ( 4 8 0 ) 941- 6300, fax: (480) 947-1 503 page 1 cop y right ? 200 3 5-03-2 004 rev a
isolated diode array with hirel mq, mx, mv, and msp screening options m i cro semi scottsdale division 8700 e. thom as rd. po bo x 139 0, scottsdale, az 85252 usa, ( 4 8 0 ) 941- 6300, fax: (480) 947-1 503 page 2 cop y right ? w w w . mi c r o s e m i . c o m scottsd a l e division 1N6101 1 n 6 1 0 1 6 1 0 1 sy mbol s & defin i ti ons symbol defi nition v br minimum bre a k do w n v o lta g e : t he minimum voltage th e de vice w i l l e x h i bit at a specifie d current. v f maximum for w ard voltage: t he max i mum for w ard volt ag e the devic e w i ll e x hi bit at a specifi ed curre n t. i r maximum l eak age c u rrent: the ma xim u m le akag e curre nt that w ill fl o w at t he spec ifie d vo ltage a nd temperatur e. c t cap a citanc e: t he cap a cita nce of the t vs as defin ed @ 0 vo lts at a frequen c y of 1 mhz an d stated in picofar ads. sch e ma ti c pac k ag e dim e n s io ns circu it supply rai l (+v cc ) g n d ( o r - v cc ) steering diode applicati o n figure 1 i/o port


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